Silicon Labs /EFR32ZG23B020F512IM48 /WDOG0_S /CFG

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Interpret as CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SW)CLRSRC 0 (DISABLE)EM1RUN 0 (DISABLE)EM2RUN 0 (DISABLE)EM3RUN 0 (DISABLE)EM4BLOCK 0 (DISABLE)DEBUGRUN 0 (EN)WDOGRSTDIS 0 (PRS0MISSRSTEN)PRS0MISSRSTEN 0 (PRS1MISSRSTEN)PRS1MISSRSTEN 0 (SEL0)PERSEL0 (DIS)WARNSEL 0 (DIS)WINSEL

EM2RUN=DISABLE, PERSEL=SEL0, WARNSEL=DIS, WINSEL=DIS, EM3RUN=DISABLE, EM4BLOCK=DISABLE, EM1RUN=DISABLE, CLRSRC=SW, DEBUGRUN=DISABLE, WDOGRSTDIS=EN

Description

No Description

Fields

CLRSRC

WDOG Clear Source

0 (SW): A write to the clear bit will clear the WDOG counter

1 (PRSSRC0): A rising edge on the PRS Source 0 will clear the WDOG counter

EM1RUN

EM1 Run

0 (DISABLE): WDOG timer is frozen in EM2.

1 (ENABLE): WDOG timer is running in EM2.

EM2RUN

EM2 Run

0 (DISABLE): WDOG timer is frozen in EM2.

1 (ENABLE): WDOG timer is running in EM2.

EM3RUN

EM3 Run

0 (DISABLE): WDOG timer is frozen in EM3.

1 (ENABLE): WDOG timer is running in EM3.

EM4BLOCK

EM4 Block

0 (DISABLE): EM4 can be entered by software. See EMU for detailed description.

1 (ENABLE): EM4 cannot be entered by software.

DEBUGRUN

Debug Mode Run

0 (DISABLE): WDOG timer is frozen in debug mode

1 (ENABLE): WDOG timer is running in debug mode

WDOGRSTDIS

WDOG Reset Disable

0 (EN): A timeout will cause a WDOG reset

1 (DIS): A timeout will not cause a WDOG reset

PRS0MISSRSTEN

PRS Src0 Missing Event WDOG Reset

PRS1MISSRSTEN

PRS Src1 Missing Event WDOG Reset

PERSEL

WDOG Timeout Period Select

0 (SEL0): Timeout period of 9 wdog cycles

1 (SEL1): Timeout period of 17 wdog cycles

2 (SEL2): Timeout period of 33 wdog cycles

3 (SEL3): Timeout period of 65 wdog cycles

4 (SEL4): Timeout period of 129 wdog cycles

5 (SEL5): Timeout period of 257 wdog cycles

6 (SEL6): Timeout period of 513 wdog cycles

7 (SEL7): Timeout period of 1k wdog cycles

8 (SEL8): Timeout period of 2k wdog cycles

9 (SEL9): Timeout period of 4k wdog cycles

10 (SEL10): Timeout period of 8k wdog cycles

11 (SEL11): Timeout period of 16k wdog cycles

12 (SEL12): Timeout period of 32k wdog cycles

13 (SEL13): Timeout period of 64k wdog cycles

14 (SEL14): Timeout period of 128k wdog cycles

15 (SEL15): Timeout period of 256k wdog cycles

WARNSEL

WDOG Warning Period Select

0 (DIS): Disable

1 (SEL1): Warning timeout is 25% of the Timeout.

2 (SEL2): Warning timeout is 50% of the Timeout.

3 (SEL3): Warning timeout is 75% of the Timeout.

WINSEL

WDOG Illegal Window Select

0 (DIS): Disabled.

1 (SEL1): Window timeout is 12.5% of the Timeout.

2 (SEL2): Window timeout is 25% of the Timeout.

3 (SEL3): Window timeout is 37.5% of the Timeout.

4 (SEL4): Window timeout is 50% of the Timeout.

5 (SEL5): Window timeout is 62.5% of the Timeout.

6 (SEL6): Window timeout is 75.5% of the Timeout.

7 (SEL7): Window timeout is 87.5% of the Timeout.

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